Semiconductor device
US7619264B2 · kind B2 · utility
4Cited by
2References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 1, 2006 |
| Grant date | Nov 17, 2009 |
| Priority date | — |
| Expiry date | Jul 1, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electric fuse includes a wide interconnect and a narrow interconnect. The electric fuse has a juxtaposed region in which a plurality of straight line portions are juxtaposed with each other by folding the wide interconnect, and the narrow interconnect has a narrower width than that of the wide interconnect, and, at the same time, is connected to the wide interconnect outside the juxtaposed region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.