Method and apparatus for variable memory cell refresh
US7619944B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2007 |
| Grant date | Nov 17, 2009 |
| Priority date | — |
| Expiry date | Jun 20, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4067
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Devices allow a system using a memory array, or the memory itself, to more efficiently control refresh intervals. This reduces standby current and the overhead associated with refresh operations. The device includes a variable analog refresh signal generation circuit that initiates a refresh operation on one or more memory cells of a memory array. The circuit integrates a refresh timer element with an event signal generator such that a refresh interval as defined by the refresh timer element is changed when events are detected that may change the data retention time of one or more memory cells. One or more of the circuits is placed to monitor an entire memory array, different sub-arrays, or different portions of different sub-arrays. This allows additional refresh operations to be closely tied to actual events, thus increasing overall efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.