Eric Carman
58Patents
15h-index
33Co-inventors
84Inventor score
Filing activity: Jul 2, 1997 → Sep 8, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7492632B2 | Memory array having a programmable word length, and method of operating same | Electricity | 348 | Active |
| US7085156B2 | Semiconductor memory device and method of operating same | Physics | 334 | Expired |
| US7542345B2 | Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same | Physics | 317 | Active |
| US7486563B2 | Sense amplifier circuitry and architecture to write data into and/or read from memory cells | Physics | 259 | Active |
| US7733693B2 | Semiconductor memory device and method of operating same | Physics | 215 | Active |
| US7933140B2 | Techniques for reducing a voltage swing | Physics | 214 | Active |
| US7085153B2 | Semiconductor memory cell, array, architecture and device, and method of operating same | Physics | 213 | Expired |
| US7301838B2 | Sense amplifier circuitry and architecture to write data into and/or read from memory cells | Physics | 150 | Expired |
| US7924630B2 | Techniques for simultaneously driving a plurality of source lines | Physics | 131 | Active |
| US7187581B2 | Semiconductor memory device and method of operating same | Physics | 102 | Expired |
| US8139418B2 | Techniques for controlling a direct injection semiconductor memory device | Physics | 53 | Active |
| US7359229B2 | Semiconductor memory device and method of operating same | Physics | 33 | Active |
| US8416636B2 | Techniques for controlling a semiconductor memory device | Physics | 28 | Active |
| US5929478A | Single level gate nonvolatile memory device and method for accessing the same | Electricity | 27 | Expired |
| US9799388B1 | Charge sharing between memory cell plates using a conductive path | Physics | 15 | Active |
| US8213226B2 | Vertical transistor memory cell and array | Electricity | 12 | Active |
| US9767880B1 | Ferroelectric memory cell apparatuses and methods of operating ferroelectric memory cells | Physics | 11 | Active |
| US8400811B2 | Techniques for providing a direct injection semiconductor memory device having ganged carrier injection lines | Physics | 9 | Active |
| US7940559B2 | Memory array having a programmable word length, and method of operating same | Electricity | 7 | Active |
| US8194487B2 | Refreshing data of memory cells with electrically floating body transistors | Physics | 7 | Active |
| US6882582B2 | EEPROM circuit voltage reference circuit and method for providing a low temperature-coefficient voltage reference | Physics | 6 | Expired |
| US9123410B2 | Memory controller for reducing capacitive coupling in a cross-point memory | Physics | 6 | Active |
| US9711213B2 | Operational signals generated from capacitive stored charge | Physics | 6 | Active |
| US10127963B2 | Charge sharing between memory cell plates using a conductive path | Physics | 5 | Active |
| US7619944B2 | Method and apparatus for variable memory cell refresh | Physics | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.