High-speed dithering architecture
US7623721B1 · kind B1 · utility
1Cited by
10References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 7, 2005 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | Oct 15, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2340/0428
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A filter for implementing Floyd Steinberg two-dimensional error diffusion algorithms allows high-speed processing of video and images. The filter is shown in direct form with proper bit precision with implementations that permit the filter to operate at high speed. Furthermore, a reduction in the gate count is achieved over the direct form. The results of static timing analysis obtained post synthesis are also summarized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.