ESD protection for bipolar-CMOS-DMOS integrated circuit devices
US7626243B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 4, 2006 |
| Grant date | Dec 1, 2009 |
| Priority date | — |
| Expiry date | May 18, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
Abstract
An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.