Stack-type semiconductor device having cooling path on its bottom surface
US7626260B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2007 |
| Grant date | Dec 1, 2009 |
| Priority date | — |
| Expiry date | Oct 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/10158
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor device having a cooling path on its bottom surface. The stack-type semiconductor device having a cooling path comprises a stack-type semiconductor chip comprising a first semiconductor chip and a second semiconductor chip. The first semiconductor chip comprises a first surface in which a circuit unit is formed and a second surface in which a first cooling path is formed, and the second semiconductor chip comprises a first surface in which a circuit unit is formed and a second surface in which a second cooling path is formed. The second surface of the first semiconductor chip and the second surface of the second semiconductor chip are bonded to each other, and a third cooling path is formed in the middle of the stack-type semiconductor chip using the first and second cooling paths. Warpage of the stack-type semiconductor device is suppressed and heat is easily dissipated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.