Thin film transistor having double-layered gate electrode and method of manufacturing the thin film transistor
US7629205B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2006 |
| Grant date | Dec 8, 2009 |
| Priority date | — |
| Expiry date | Nov 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/666
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thin film transistor (TFT) that can prevent damage to a silicon layer under a gate electrode in an annealing process by using a first gate electrode having high thermal resistance and a second gate electrode having high reflectance and a method of manufacturing the TFT are provided. The method of manufacturing a TFT includes forming a double-layered gate electrode which includes a first gate electrode formed of a material having high thermal resistance and a second gate electrode formed of a metal having high optical reflectance on the first gate electrode, and forming a source and a drain by annealing doped regions on both sides of a silicon layer under the gate electrode by radiating a laser beam onto the entire upper surface of the silicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.