Method of fabricating a single electron transistor having memory function
US7629244B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2006 |
| Grant date | Dec 8, 2009 |
| Priority date | — |
| Expiry date | Apr 29, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/938
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A single electron transistor having a memory function and a fabrication method thereof are disclosed. In the single electron transistor, a first substrate and an insulation film are sequentially stacked, a second substrate is stacked on the insulation film and includes a source region, a channel region, and a drain region, a tunneling film is formed on the second substrate, at least two trap layers are formed on the tunneling film and are separated by an interval such that at least one quantum dot may be formed in a same interval in the channel region, and a gate electrode is formed to contact the at least two trap layers and the tunneling film between the at least two trap layers. Because the single electron transistor is simple and includes a single gate electrode, a fabricating process and an operational circuit thereof may be simplified, and power consumption may be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.