Device for transmitting data between memories
US7631153B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2006 |
| Grant date | Dec 8, 2009 |
| Priority date | — |
| Expiry date | Nov 25, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for data transmission between memories has a memory controller as well as a memory protocol controller. In one embodiment, a first memory controller is operatively connected to a first memory, and a memory protocol controller is operatively connected between the first memory controller and a second memory, wherein the first memory is a volatile memory and the second memory is a nonvolatile memory. The volatile memory includes a command list containing a command sequence for the memory protocol controller. The memory protocol controller may be configured to produce at least one of an error detection code and an error correction code when an error condition occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.