Self-aligned contact formation utilizing sacrificial polysilicon
US7632736B2 · kind B2 · utility
1Cited by
7References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2007 |
| Grant date | Dec 15, 2009 |
| Priority date | — |
| Expiry date | Dec 18, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76897
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In general, in one aspect, a method includes forming a spacer layer over a substrate having patterned stacks formed therein and trenches between the patterned stacks. A sacrificial polysilicon layer is deposited over the substrate to fill the trenches. A patterning layer is deposited over the substrate and patterned to define contact regions over at least a portion of the trenches. The sacrificial polysilicon layer is etched using the patterned patterning layer to form open regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.