Noise immune over current protection with inherent current limiting for switching power converter
US7636227B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2007 |
| Grant date | Dec 22, 2009 |
| Priority date | — |
| Expiry date | Jul 26, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H1/04
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit for providing over-current protection, the circuit including a gate driver circuit for controlling a bridge circuit including a half bridge stage having high and low switches. The circuit includes a feedback loop circuit for counting over-current indicators sensed during one or more consecutive PWM cycles; wherein when an over-current indicator is sensed, the low switch is turned OFF for duration of a first time period after which the low switch is turned back ON, to enable determination of an over-current condition where false noise signals are rejected thereby preventing circuit shutdowns due to false over-current condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.