Patent · US Active

Wordline booster circuit and method of operating a wordline booster circuit

US7636254B2 · kind B2 · utility

4Cited by

6References

15Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Sebastian Ehrenreich · Sonneberg, DE
Juergen Pille · Stuttgart, DE
Otto A. Torreiter · Echterdingen, DE

Key dates

Filing date	Aug 30, 2007
Grant date	Dec 22, 2009
Priority date	—
Expiry date	Feb 1, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/413
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention relates to a wordline booster circuit, especially an SRAM-wordline booster circuit, comprising a driving element (20) for shifting a voltage level of a charge storage element (50) for storing a charge necessary to generate a boosted voltage (Vb), a feedback element (30) for controlling the switching state of a charging element (40), wherein the charging element (40) is actively switchable between a turned-off state during a first time interval and a turned-on state during a second time interval, and an output port (14) for supplying the boost voltage to at least one wordline-driver circuit (100) of a memory device (200). The invention relates also to an operation method for such a wordline booster circuit as well as a memory array implementation on an integrated circuit, especially an SRAM memory array, with a wordline booster circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.