High holding voltage dual direction ESD clamp
US7639464B1 · kind B1 · utility
14Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2006 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Mar 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
In a dual direction ESD protection structure, first and second NMOS devices are serially connected back-to-back by connecting their drains or their sources using a common floating interconnect, while ensuring that the devices remain isolated from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.