Patent · US Active

Method and apparatus for partial reconfiguration circuit design for a programmable device

US7640527B1 · kind B1 · utility

72Cited by
7References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 2006
Grant dateDec 29, 2009
Priority date
Expiry dateOct 31, 2026

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/392
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Method, apparatus, and computer readable medium for circuit design for a programmable device is described. In one example, a logical description of a circuit design having static logic and reconfigurable logic is imported into a graphical environment. The circuit design is processed in the graphical environment. In particular, the logical description is floorplanned to locate the static logic and the reconfigurable logic in a floorplan of the programmable device. At least one design rule check (DRC) is performed. A partial reconfiguration implementation of the circuit design is then managed for the programmable device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.