Method of making a semiconductor package and method of making a semiconductor device
US7642133B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2007 |
| Grant date | Jan 5, 2010 |
| Priority date | — |
| Expiry date | Aug 2, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.