Method of manufacturing nanowire
US7642177B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 22, 2006 |
| Grant date | Jan 5, 2010 |
| Priority date | — |
| Expiry date | Oct 24, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/762
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a nanowire, a method of manufacturing a semiconductor apparatus including a nanowire and a semiconductor apparatus formed from the same are provided. The method of manufacturing a semiconductor apparatus may include forming a material layer pattern on a substrate, forming a first insulating layer on the material layer pattern, a first nanowire forming layer and a top insulating layer on the substrate, wherein a total depth of the first insulating layer and the first nanowire forming layer may be formed to be smaller than a depth of the material layer pattern, sequentially polishing the top insulating layer, the first nanowire forming layer and the first insulating layer so that the material layer pattern is exposed, exposing part of the first nanowire forming layer to form an exposed region and forming a single crystalline nanowire on an exposed region of the first nanowire forming layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.