Content addressable memory having programmable interconnect structure
US7643353B1 · kind B1 · utility
54Cited by
14References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2008 |
| Grant date | Jan 5, 2010 |
| Priority date | — |
| Expiry date | Aug 26, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/046
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content addressable memory (CAM) device includes a CAM array, a programmable interconnect structure, and a priority encoder. The CAM array includes a plurality of CAM rows, each row including a number of CAM cells for storing a data word and coupled to a match line that indicates a match result for the CAM row. The programmable interconnect structure is coupled to each CAM row and is configured to selectively route the match results from a first CAM row as an input match signal to any number of arbitrarily selected CAM rows at the same time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.