High density integrated read-only memory (ROM) with reduced access time
US7646069B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2006 |
| Grant date | Jan 12, 2010 |
| Priority date | — |
| Expiry date | Apr 25, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
Abstract
An integrated circuit memory of the read-only memory type includes at least one memory cell. Each memory cell includes a storage transistor realized in a semiconductor substrate and presenting a source connected to a reference potential, a gate connected to an electrically conductive word line, and a drain connected to an electrically conductive bit line by an optional connection depending on whether the memory cell is assigned the value 0 or 1. The storage transistor of each memory cell includes a gate formed on the substrate, in the form of a window whose inner contour delimits a central drain region in the substrate, and whose outer contour delimits at least one source region in the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.