Semiconductor package and method using isolated Vss plane to accommodate high speed circuitry ground isolation
US7646091B2 · kind B2 · utility
2Cited by
0References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2006 |
| Grant date | Jan 12, 2010 |
| Priority date | — |
| Expiry date | Jun 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate which can have an integrated circuit die attached thereto. The package includes a dedicated high-speed ground plane that is electrically isolated from the ground plane used to ground the low speed circuitry of the package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.