Defect detection system with multilevel output capability and method thereof
US7646203B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2007 |
| Grant date | Jan 12, 2010 |
| Priority date | — |
| Expiry date | Mar 27, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3191
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A defect detection system and related method take advantage of multilevel detection technique for detecting defects on an integrated circuit. The defect detection system utilizes an analog-to-digital converter for converting an analog sensing signal into an output code having a plurality of bits. The defect detection methods include an open test method and a short test method. The open and short test methods both include a calibrating method and a testing method individually. The calibrating method functions to determine a preset reference voltage for the analog-to-digital converter based on a predetermined code. The testing method makes use of the preset reference voltage and the predetermined code for generating the output code having a plurality of bits. The output code is then utilized to determine whether or not there are open or short defects on the integrated circuit and to classify the defects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.