Method to fabricate gate electrodes
US7648898B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 19, 2008 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Mar 9, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/83
Abstract
A method for fabricating a semiconductor device comprises depositing a first layer of oxide on at least a portion of a channel of a transistor. The method further comprises depositing a layer of nitride on the first layer of oxide and etching at least a portion of the layer of nitride to the first layer of oxide. The method further comprises depositing a second layer of oxide and planarizing the oxide to expose at least a portion of the layer of nitride. The method further comprises stripping at least a portion of the layer of nitride to create one or more notches and removing at least a portion of the first layer of oxide. The method further comprises depositing a layer of polysilicon, wherein at least a portion of the layer of polysilicon is deposited into at least one of the one or more notches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.