Patent · US Active

Micro-via structure design for high performance integrated circuits

US7649265B2 · kind B2 · utility

0Cited by

0References

19Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Chunfei Ye · Lacey, US
Boping Wu · Folsom, US

Key dates

Filing date	Sep 29, 2006
Grant date	Jan 19, 2010
Priority date	—
Expiry date	Feb 7, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH05K2201/10674
WIPO fieldAudio-visual technology
WIPO sectorElectrical engineering

Abstract

In some embodiments, a micro-via structure design for high performance integrated circuits is presented. In this regard, an integrated circuit chip package is introduced having a dielectric layer, a plated throughhole in the dielectric layer, and a micro-via coupled with the plated throughhole, wherein the micro-via forms a path around an axis. Other embodiments are also disclosed and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.