Arrangement of an electrical component placed on a substrate, and method for producing the same
US7649272B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2004 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Jan 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electrical component is placed on a substrate. At least one film comprising a plastic material is connected to the component and to the substrate in such a way that a surface contour defined by the component and the substrate is represent is represented in a surface contour of the part of the film. Said film is laminated onto the component and the substrate in such a way that the film follows the topology of the arrangement consisting of the component and the substrate. Said film is in contact with the component and the substrate in a positive and non-positive manner, and comprises a composite material containing a filler that is different to the plastic material. The processability and electrical properties of the film are influenced by the filler or the composite material obtained thereby. In this way, other functions can be integrated into the film. Said component is, for example, a power semiconductor component. An electrically insulating and thermoconductive film is used, for example. A contact surface of the power semiconductor is electrically contracted through the film. The thermal conductivity of the film enables heat created during the operation of the power semiconduc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.