Logic circuits with electric field relaxation transistors and semiconductor devices having the same
US7649380B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2007 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Sep 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a logic circuit, a first switching device is connected between a first voltage and an output terminal through which an output signal is output. The switching device is selectively activated and deactivated based on an input signal. A second switching device is connected to a ground voltage and is selectively activated and deactivated based on the input signal. A control circuit outputs a control signal in response to the input signal. The control signal has a first voltage level during a first time period in which a state of the input signal changes, and has a second voltage level during a second time period in which a state of the input signal is constant. The second voltage level is lower than the first voltage level. A field relaxation circuit is connected between the terminal through which the output signal is output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.