Hierarchical immutable content-addressable memory processor
US7650460B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 25, 2008 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | May 24, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.