Semiconductor integrated circuit

US7652333B2 · kind B2 · utility

Assignee

• Renesas Technology Corporation · JP

Inventors

• Osamu Ozawa · Tokyo, JP
• Toshio Sasaki · Nagoya, JP
• Ryo Mori · Tokyo, JP
• Takashi Kuraishi · Chofu, JP
• Yoshihiko Yasu · Kodaira, JP
• Koichiro Ishibashi · Warabi, JP

Key dates

• Filing date: Dec 21, 2006
• Grant date: Jan 26, 2010
• Expiry date: Feb 28, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

The semiconductor integrated circuit has so-called SOI type first MOS transistors (MNtk, MPtk) and second MOS transistors (MNtn, MPtn). The first MOS transistors have a gate isolation film thicker than that the second MOS transistors have. The first and second MOS transistors constitute a power-supply-interruptible circuit (6) and a power-supply-uninterrupted circuit (7). The power-supply-interruptible circuit has the first MOS transistors each constituting a power switch (10) between a source line (VDD) and a ground line (VSS), and the second MOS transistors connected in series with the power switch. A gate control signal for the first MOS transistors each constituting a power switch is made larger in amplitude than that for the second MOS transistors. This enables power-source cutoff control with a high degree of flexibility commensurate with the device isolation structure, which an SOI type semiconductor integrated circuit has originally.