Method for depositing a metal gate on a high-k dielectric film
US7655549B2 · kind B2 · utility
2Cited by
11References
20Claims
0Family size
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Key dates
| Filing date | Feb 6, 2006 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Jun 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method to improve a high-k dielectric film and metal gate interface in the fabrication of a MOSFET by depositing a metal gate on a high-k dielectric, the method includes annealing a substrate with a high-k dielectric film deposited thereon in a thermal annealing module and depositing a metal gate material on the annealed substrate in a metal gate deposition module, wherein the annealing step and the depositing step are carried out consecutively without a vacuum break.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.