Apparatus for all-digital serializer-de-serializer and associated methods
US7656323B2 · kind B2 · utility
15Cited by
6References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2008 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | May 12, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0685
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An all-digital serializer-de-serializer includes an all-digital clock multiplier unit (CMU) circuit, an all-digital clock and data recovery (CDR) circuit, a multiplexer (MUX), and a demultiplexer (DeMUX). The all-digital clock and data recovery (CDR) circuit couples to the all-digital clock multiplier unit (CMU) circuit. The multiplexer (MUX), couples to all-digital clock multiplier unit (CMU) circuit, and serializes data. The demultiplexer (DeMUX), couples to the all-digital clock and data recovery (CDR) circuit, and de-serializes data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.