Method for forming fully silicided gate electrode in a semiconductor device
US7659189B2 · kind B2 · utility
1Cited by
2References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2007 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Jan 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/668
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor MOS device includes a semiconductor substrate; a gate oxide layer disposed on the semiconductor substrate; a fully silicided gate electrode disposed on the gate oxide layer; a composite thin film interposed between the fully silicided gate electrode and the gate oxide layer; a spacer on sidewall of the fully silicided gate electrode; and a source/drain region implanted into the semiconductor substrate next to the spacer. A method for forming the semiconductor MOS device is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.