Methods of forming stepped bumps and structures formed thereby
US7659192B2 · kind B2 · utility
1Cited by
2References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2006 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Dec 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming a microelectronic device and associated structures are described. Those methods may comprise forming a die-side conductive interconnect on a substrate, wherein the die-side conductive interconnect comprises a columnar portion and a base portion, and wherein a diameter of the base portion is greater than a diameter of the columnar portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.