Patent · US Active

Triaxial through-chip connection

US7659202B2 · kind B2 · utility

34Cited by
166References
22Claims
0Family size

Inventor

Key dates

Filing dateMar 30, 2007
Grant dateFeb 9, 2010
Priority date—
Expiry dateApr 4, 2027

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T428/24174
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method performed on a wafer having multiple chips each including a doped semiconductor and substrate involves etching an annulus trench, metalizing an inner and an outer perimeter side wall of the annulus trench, etching a via trench into the wafer, making a length of the via trench electrically conductive, thinning a surface of the substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.