Patent · US Active

Circuit arrangement for processing data

US7661056B2 · kind B2 · utility

0Cited by

23References

11Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventor

Stefan Ruping · Lengdorf, DE

Key dates

Filing date	Aug 25, 2005
Grant date	Feb 9, 2010
Priority date	—
Expiry date	Feb 11, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/1044
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Circuit arrangement including an encoding unit having a first input for receiving an address word and a second input for receiving a data word and a check word, wherein the encoding unit outputs an alarm signal if the check word does not correspond to at least the address word or the data word.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.