Content based yield prediction of VLSI designs
US7661081B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2008 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Jul 23, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit system and program product for predicting yield of a VLSI design. An integrated circuit system is provided including a system for identifying and grouping sub-circuits contained within an integrated circuit design by circuit type; a critical area calculation system for determining critical area values for different regions, wherein each different region is associated with a circuit type; a tallying system for calculating a plurality of tallies of critical area values based on circuit type; and a plurality of modeling subsystems for separately modeling each of the plurality of tallies based on circuit type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.