Vertical field-effect transistor and method of forming the same

US7663183B2 · kind B2 · utility

Assignee

• Flextronics International USA, Inc. · US

Inventors

• Berinder Brar · Newbury Park, US
• Wonill Ha · Thousand Oaks, US

Key dates

• Filing date: Jun 19, 2007
• Grant date: Feb 16, 2010
• Expiry date: Nov 2, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D8/60

Abstract

A semiconductor device, a method of forming the same, and a power converter including the semiconductor device. In one embodiment, the semiconductor device includes a heavily doped substrate, a source/drain contact below the heavily doped substrate, and a channel layer above the heavily doped substrate. The semiconductor device also includes a heavily doped source/drain layer above the channel layer and another source/drain contact above the heavily doped source/drain layer. The semiconductor device further includes pillar regions through the another source/drain contact, the heavily doped source/drain layer, and portions of the channel layer to form a vertical cell therebetween. Non-conductive regions of the semiconductor device are located in the portions of the channel layer within the pillar regions. The semiconductor device still further includes a gate above the non-conductive regions in the pillar regions. The semiconductor device may also include a Schottky diode including the channel layer and a Schottky contact.