Integrated passive device and method of fabrication
US7663196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2007 |
| Grant date | Feb 16, 2010 |
| Priority date | — |
| Expiry date | Mar 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A device 20 includes substrates 22 and 24 coupled to form a volume 32 between the substrates. A surface 28 of the substrate 22 faces a surface 30 of the substrate 24. A metal-insulator-metal capacitor 34 is formed on one of the surfaces 28 and 30. A conductive element 58 spans between a top electrode 56 of the capacitor 34 and the other surface 28 and 30. Vias 64 and 66 extend through the substrate 22 and are electrically interconnected with the conductive element 58 and a bottom electrode 52 of the capacitor 34. Another device 72 includes an underpass transmission line 92 formed on a surface 80 of a substrate 74 within a volume 84 formed between the substrate 74 and another substrate 76. The line 92 underlies an integrated device 96 formed on a surface 78 of the substrate 74.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.