Sense amplifier circuit having current mirror architecture
US7663928B2 · kind B2 · utility
419Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2007 |
| Grant date | Feb 16, 2010 |
| Priority date | — |
| Expiry date | Apr 14, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier circuit for use in a semiconductor memory device has complemented logic states at opposite sides of the latch circuit in the sense amplifier circuit determinate all the time in operation. The sense amplifier circuit takes advantage of a current mirror circuit for ascending or descending a voltage level at the gate of a transistor by charge accumulation or charge dissipation, which turns on or off the transistor so as to control the logic states at opposite sides of the latch circuit in the sense amplifier circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.