Automatic on-die defect isolation
US7667231B2 · kind B2 · utility
18Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2006 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | Oct 29, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2831
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Microcircuits may include polysilicon features that are vulnerable to defects due to undesirable phenomena during manufacturing processes such as, inter alia, over-etching. The same phenomena that may cause defects can be exploited to automatically isolate the affected circuit and thus limit the harm caused by defects or incipient defects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.