Fan out type wafer level package structure and method of the same
US7667318B2 · kind B2 · utility
40Cited by
17References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2008 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | Oct 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.