Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
US7671459B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2006 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | May 1, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate. A first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing. A second known good packaged microelectronic device is coupled to the first device in a stacked configuration. The second device can include a second interposer substrate having a plurality of second interposer pads and a second die electrically coupled to the second interposer substrate. The exposed portions of the first interconnects are electrically coupled to corresponding second interposer pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.