Negative N-epi biasing sensing and high side gate driver output spurious turn-on prevention due to N-epi P-sub diode conduction during N-epi negative transient voltage
US7671638B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2008 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | Aug 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0081
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high-side driver in a driver circuit for driving a half-bridge stage having high- and low-side power switching devices series connected at a switched node, the high-side driver driving the high-side power switching device. The high-side driver including first and second complementary switched MOSFET series connected at a high-side node, driving the high-side power switching device, one of the MOSFETs having a parasitic bipolar transistor formed between the substrate, an N+ epitaxial region connected to the high-side driver supply voltage and the switched node, with the parasitic transistor having a base electrode formed by the N+ epitaxial region, an emitter electrode formed by the substrate and a collector electrode formed by the switched node, such that if a transient voltage that is negative with respect to the substrate is present at the high-side driver supply voltage, the parasitic transistor will conduct a short circuit current between the switched node and the substrate; a first circuit for controlling the conduction of the first and second MOSFETs to switch the high-side switching device ON and OFF; a diffusion in the N+ epitaxial region in which a terminal connected to …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.