Phase change memory device
US7675770B2 · kind B2 · utility
6Cited by
18References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2006 |
| Grant date | Mar 9, 2010 |
| Priority date | — |
| Expiry date | Nov 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A phase change memory device, comprising a phase change memory device; a semiconductor substrate; a MOS transistor disposed at each intersection of a plurality of word lines and a plurality of bit lines arranged in a matrix form; a plurality of phase change memory elements for storing data of a plurality of bits, each formed on an upper area opposite to a diffusion layer of the MOS transistor in a phase change layer made of phase change material; a lower electrode structure for electrically connecting each of the plurality of phase change memory elements to the diffusion layer of the MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.