Write combining protocol between processors and chipsets
US7676603B2 · kind B2 · utility
3Cited by
15References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2004 |
| Grant date | Mar 9, 2010 |
| Priority date | — |
| Expiry date | Mar 27, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods of processing write transactions provide for combining write transactions on an input/output (I/O) hub according to a protocol between the I/O hub and a processor. Data associated with the write transactions can be flushed to an I/O device without the need for proprietary software and specialized registers within the I/O device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.