Method of fabricating copper damascene and dual damascene interconnect wiring

US7678683B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Jeffrey P. Gambino · Gresham, US
• William R. Hill · Binghamton, US
• Kenneth E. McAvey, Jr. · Winooski, US
• Thomas L. McDevitt · Underhill, US
• Anthony K. Stamper · Williston, US
• Arthur C. Winslow · South Burlington, US
• Robert Zwonik · Colchester, US

Key dates

• Filing date: Nov 1, 2006
• Grant date: Mar 16, 2010
• Expiry date: Mar 29, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76834
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.