Patent · US Active

Method for manufacturing a semiconductor component and a semiconductor component, in particular a diaphragm sensor

US7679154B2 · kind B2 · utility

0Cited by
8References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 10, 2007
Grant dateMar 16, 2010
Priority date
Expiry dateDec 10, 2027

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB81C2201/0136
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

In a method for manufacturing a semiconductor component having a semiconductor substrate, a flat, porous diaphragm layer and a cavity underneath the porous diaphragm layer are produced to form unsupported structures for a component. In a first approach, the semiconductor substrate may receive a doping in the diaphragm region that is different from that of the cavity. This permits different pore sizes and/or porosities to be produced, which is used in producing the cavity for improved etching gas transport. Also, mesopores may be produced in the diaphragm region and nanopores may be produced as an auxiliary structure in what is to become the cavity region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.