Microcircuit package having ductile layer
US7679185B2 · kind B2 · utility
5Cited by
23References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2007 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Feb 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microcircuit package having a ductile layer between a copper flange and die attach. The ductile layer absorbs the stress between the flange and semiconductor device mounted on the flange, and can substantially reduce the stress applied to the semiconductor device. In addition, the package provides the combination of copper flange and polymeric dielectric with a TCE close to copper, which results in a low stress structure of improved reliability and conductivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.