Voltage level shifter and buffer using same
US7679418B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 27, 2007 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Apr 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage level shifter with an input transistor pair, a cross-coupled load chain transistor pair and a pair of current sources, effects reduced power consumption through the use of the cross-coupled load chain transistor pair to minimize the DC current component present in known voltage level shifters. In specific embodiments, feedback elements may be used to minimize delays in signal transitions. A reference voltage that corresponds to a current capability of the input transistor pair may be used to regulate the current sources in the load chain. Changes in a swing of the input signal voltage received by the input transistor pair may be reflected in corresponding changes to the reference voltage. The voltage level shifter may be of particular use in a buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.