Process for managing complex pre-wired net segments in a VLSI design
US7681169B2 · kind B2 · utility
1Cited by
11References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 29, 2007 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Nov 13, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for pre-wiring through multiple levels of metal using flues includes steps of: receiving information comprising flue geometries and flue properties; producing multiple routing patterns of a design for the flues; identifying macro instance terminals to be pre-wired in the design; selecting at least one of the routing patterns for the macro instance terminals in the design to avoid blockage; and instantiating the design such that the flues can be manipulated as vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.