Manufacturing method of electronic device with resist ashing
US7682983B2 · kind B2 · utility
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3References
16Claims
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Key dates
| Filing date | Jul 17, 2006 |
| Grant date | Mar 23, 2010 |
| Priority date | — |
| Expiry date | Nov 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31138
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of an electronic device, includes the steps of: implanting P (phosphorous) ions into a substrate semiconductor region made of Si or SiGe by using a resist as a mask; ashing the resist while it is heated in a vacuum environment; and taking out the substrate, the substrate being ashing processed so that a temperature of the substrate is equal to or less than 130° C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.