Autonomous sequencing and fault spreading
US7685320B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2006 |
| Grant date | Mar 23, 2010 |
| Priority date | — |
| Expiry date | May 17, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power management system may be configured to allow digital information relating to the power management functions of sequencing and fault spreading to be passed between POL regulators using a standard multi-master multi-slave interface such as I2C bus interface or SMBus interface. POL regulators may be configured via pin strapping, and coupled to a serial data bus where they may monitor bus transactions initiated by other similar POL regulators. Each POL regulator may respond to the bus transactions initiated by other POL regulators according to its configuration, and may perform a variety of tasks associated with sequencing and fault spreading in addition to regulating its own voltage output. When configured with a standard multi-master/multi-slave interface such as an I2C bus interface or SMBus interface, the POL regulators may report information to multiple other POL regulators while maintaining compatibility with non-POL devices also connected to the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.