Patent · US Active

Method of operating an integrated circuit having at least one memory cell

US7688634B2 · kind B2 · utility

13Cited by
1References
48Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 6, 2007
Grant dateMar 30, 2010
Priority date
Expiry dateOct 13, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C16/28
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments of the invention relate generally to a method for writing at least one memory cell of an integrated circuit; a method for writing at least two memory cells of an integrated circuit; and to integrated circuits. In an embodiment of the invention, a method for writing at least one memory cell of an integrated circuit is provided. The method includes determining a writing state of at least one reference memory cell, depending on the writing state of the at least one reference memory cell, writing the at least one memory cell, and writing the at least one reference memory cell to a given writing state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.